74HCT138D,653 Mounting Type, Nexperia 74HCT138D,653, Decoder, 16-Pin SO16

The 74HC138, 74HCT138 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1, E2 and E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion to a 1-of-32 (5 to 32 lines) decoder with just four 138 ICs and one inverter. The 138 can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes.
Multiple input enable for easy expansion or independent controlsIntegrated input latch to store the address of decoder linesIdeal for memory chip select decodingAsynchronous and synchronous load optionsOvervoltage tolerant input optionsInverting and non-inverting output options3-stage outputsHigh frequencyCan be cascadedKey applicationsSelection of memory banks and peripheralsI/O expansion