* УТОЧНЯЙТЕ ВОЗМОЖНОСТЬ, ЦЕНУ И СРОК ПОСТАВКИ, В СВЯЗИ С ОГРАНИЧЕНИЕМ ЭКСПОРТА ТОВАРОВ ИЗ СТРАН ЕС И ВЕЛИКОБРИТАНИИ
System developers designing high-end embedded control applications can benefit from a new Digital Signal Controller (DSC) with two dsPIC DSC cores in a single chip. The dsPIC33CH has one core that is designed to function as a master while the other is designed as a slave. The slave core is useful for executing dedicated, time-critical control code while the master core is busy running the user interface, system monitoring and communications functions, customized for the end application.
Operating Conditions3V to 3.6V, -40°C to +125°CCore: Dual 16-Bit dsPIC33CH CPUsMaster Core 90 MIPS and Slave Core 100 MIPS OperationIndependent Peripherals for Master Core and Slave CoreConfigurable Shared Resources for Master Core and Slave CoreProgrammable PLLs and Oscillator Clock SourcesFast Wake-up and Start-upBackup Internal OscillatorLow-Power Management Modes (Sleep, Idle, Doze)Integrated Power-on Reset and Brown-out ResetDebugger Development Support
Datasheet
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