74LVC273PW,118 Logic Family, Nexperia 74LVC273PW,118 D Type Flip Flop IC, D Type Flip-Flop, 20-Pin TSSOP

The 74LVC273 has eight edge-triggered, D-type flip-flops with individual Dn inputs and Qn outputs. The common clock (CP) and master reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The state of each Dn input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding output (Qn) of the flip-flop. All outputs will be forced LOW independently of clock or data inputs by a LOW voltage level on the MR input.
Mixed 5 V and 3.3 V applicationsImproved signal integrity with integrated termination resistorsHigh noise immunityFlow through pin out for easy layoutWide supply voltage rangeLow propagation delayOvervoltage tolerant input optionsIntegrated source termination resistor optionsBus hold optionsFrequency divisionControlled delaysInterface between asynchronous and synchronous systems