Nexperia 74LVC4245APW,118 Voltage Level Translator, 24-Pin TSSOP

74LVC Family Bus Transceivers, Nexperia

Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS

The 74LVC4245A is an octal dual supply translating transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. It is designed to interface between a 3 V and 5 V bus in a mixed 3 V and 5 V supply environment. The device features an output enable input (pin OE) for easy cascading and a send/receive input (pin DIR) for direction control. Pin OE controls the outputs so that the buses are effectively isolated. In suspend mode, when VCC(A) is zero, there will be no current flow from one supply to the other supply. The A-outputs must be set 3-state and the voltage on the A-bus must be smaller than Vdiode (typical 0.7 V). VCC(A) ≥ VCC(B), except in suspend mode.

Wide supply voltage range
Low propagation delay
Low power suspend mode
Auto-direction sensing
3-state output options
Overvoltage tolerant options

74LVC Family

Datasheet

ESD Control Selection Guide V1