Nexperia 74LVC125APW,118 Buffer, Line Driver Logic Gate, 14-Pin TSSOP, Буфер и драйвер

74LVC Family Inverters & Buffers

Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS

The 74LVC125A consists of four non-inverting buffers/line drivers with 3-state outputs (nY) that are controlled by the output enable input (nOE). A HIGH at nOE causes the outputs to assume a high-impedance OFF-state. Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to the outputs.

Mixed 5 V and 3.3 V applications
Improved current drive and voltage level of signals
Improved signal integrity for complex layouts
Wide supply voltage range
Low propagation delay
TTL input options
3-state output options
Overvoltage tolerant options
Registered options
Key applications
LCD TV
Cell phones
Industrial monitoring
STB

74LVC Family

Datasheet

ESD Control Selection Guide V1