MC14526BDWG Package Type, onsemi MC14526BDWG 1-stage Surface Mount Divide-By-N Counter, 16-Pin SOIC

4000 Series Counters \u0026 Shift Registers, ON Semiconductor
The MC14526B binary counter is constructed with MOS P-channel and N-channel enhancement mode devices in a monolithic structure. This device is presettable, cascadable, synchronous down counter with a decoded \"0\"" state output for divide-by-N applications. In single stage applications the \""0\"" output is applied to the Preset Enable input. The Cascade Feedback input allows cascade divide-by-N operation with no additional gates required. The Inhibit input allows disabling of the pulse counting function. Inhibit may also be used as a negative edge clock. This complementary MOS counter can be used in frequency synthesizers, phase-locked loops, and other frequency division applications requiring low power dissipation and/or high noise immunity.
Supply Voltage Range = 3.0 Vdc to 18 VdcLogic Edge-Clocked Design - Incremented on Positive Transition of Clock or Negative Transition of InhibitAsynchronous Preset EnableCapable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load Over the Rated Temperature Range
4000 CMOS Logic Family, ON Semiconductor
CMOS Family devicesWide operating voltage range: 3 to 18V