9DB833AGILF Maximum Supply Current, Renesas Electronics 9DB833AGILF Clock Buffer 48-Pin TSSOP-48

The Renesas Electronics 9DB833 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB833 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator.
3 selectable SMBus addresses","multiple devices canshare the same SMBus segmentOE# pins","suitable for Express Card applicationsPLL or bypass mode","PLL can dejitter incoming clockSelectable PLL bandwidth","minimizes jitter peaking indownstream PLLsSpread spectrum compatible","tracks spreading inputclock for low EMI