* УТОЧНЯЙТЕ ВОЗМОЖНОСТЬ, ЦЕНУ И СРОК ПОСТАВКИ, В СВЯЗИ С ОГРАНИЧЕНИЕМ ЭКСПОРТА ТОВАРОВ ИЗ СТРАН ЕС И ВЕЛИКОБРИТАНИИ
The Alliance Memory 128Mb SDRAM is a high-speed CMOS synchronous DRAM containing 128 Mbits. It is internally configured as 4 Banks of 2M word x 16 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Read and write accesses to the SDRAM are burst oriented
accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of a BankActivate command which is then followed by a Read or Write command.
Auto Refresh and Self Refresh
4096 refresh cycles/64ms
CKE power down mode
Single +3.3V 0.3V power supply
Interface: LVTTL
Datasheet - AS4C8M16SA-6TIN